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Data Structures</h2></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_gpio_ps___config.html">XGpioPs_Config</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">This typedef contains configuration information for a device.  <a href="struct_x_gpio_ps___config.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_gpio_ps.html">XGpioPs</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">The <a class="el" href="struct_x_gpio_ps.html" title="The XGpioPs driver instance data. ">XGpioPs</a> driver instance data.  <a href="struct_x_gpio_ps.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
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Macros</h2></td></tr>
<tr class="memitem:ga5e68d2ebc1ac8f1b759c0945ad6ef78b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#ga5e68d2ebc1ac8f1b759c0945ad6ef78b">XGPIOPS_H</a></td></tr>
<tr class="memdesc:ga5e68d2ebc1ac8f1b759c0945ad6ef78b"><td class="mdescLeft">&#160;</td><td class="mdescRight">by using protection macros  <a href="group__gpiops.html#ga5e68d2ebc1ac8f1b759c0945ad6ef78b">More...</a><br/></td></tr>
<tr class="separator:ga5e68d2ebc1ac8f1b759c0945ad6ef78b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1e440e05bbea534ebf6939e88eb1455f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#ga1e440e05bbea534ebf6939e88eb1455f">XGPIOPS_BANK_MAX_PINS</a>&#160;&#160;&#160;(u32)32</td></tr>
<tr class="memdesc:ga1e440e05bbea534ebf6939e88eb1455f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Max pins in a GPIO bank.  <a href="group__gpiops.html#ga1e440e05bbea534ebf6939e88eb1455f">More...</a><br/></td></tr>
<tr class="separator:ga1e440e05bbea534ebf6939e88eb1455f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac5c6fe277747f034cd30c3f3e770dc5b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#gac5c6fe277747f034cd30c3f3e770dc5b">XGPIOPS_BANK0</a>&#160;&#160;&#160;0x00U</td></tr>
<tr class="memdesc:gac5c6fe277747f034cd30c3f3e770dc5b"><td class="mdescLeft">&#160;</td><td class="mdescRight">GPIO Bank 0.  <a href="group__gpiops.html#gac5c6fe277747f034cd30c3f3e770dc5b">More...</a><br/></td></tr>
<tr class="separator:gac5c6fe277747f034cd30c3f3e770dc5b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga88ebd56b0defc49ebd308951df1eaf0e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#ga88ebd56b0defc49ebd308951df1eaf0e">XGPIOPS_BANK1</a>&#160;&#160;&#160;0x01U</td></tr>
<tr class="memdesc:ga88ebd56b0defc49ebd308951df1eaf0e"><td class="mdescLeft">&#160;</td><td class="mdescRight">GPIO Bank 1.  <a href="group__gpiops.html#ga88ebd56b0defc49ebd308951df1eaf0e">More...</a><br/></td></tr>
<tr class="separator:ga88ebd56b0defc49ebd308951df1eaf0e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae57e0fee992d409f0ff32d35e68f6fbc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#gae57e0fee992d409f0ff32d35e68f6fbc">XGPIOPS_BANK2</a>&#160;&#160;&#160;0x02U</td></tr>
<tr class="memdesc:gae57e0fee992d409f0ff32d35e68f6fbc"><td class="mdescLeft">&#160;</td><td class="mdescRight">GPIO Bank 2.  <a href="group__gpiops.html#gae57e0fee992d409f0ff32d35e68f6fbc">More...</a><br/></td></tr>
<tr class="separator:gae57e0fee992d409f0ff32d35e68f6fbc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac994de03aa64e2b6b3c6b6da9d76e020"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#gac994de03aa64e2b6b3c6b6da9d76e020">XGPIOPS_BANK3</a>&#160;&#160;&#160;0x03U</td></tr>
<tr class="memdesc:gac994de03aa64e2b6b3c6b6da9d76e020"><td class="mdescLeft">&#160;</td><td class="mdescRight">GPIO Bank 3.  <a href="group__gpiops.html#gac994de03aa64e2b6b3c6b6da9d76e020">More...</a><br/></td></tr>
<tr class="separator:gac994de03aa64e2b6b3c6b6da9d76e020"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7dae320aafb3cb94ac932b34910c7aca"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#ga7dae320aafb3cb94ac932b34910c7aca">XGPIOPS_BANK4</a>&#160;&#160;&#160;0x04U</td></tr>
<tr class="memdesc:ga7dae320aafb3cb94ac932b34910c7aca"><td class="mdescLeft">&#160;</td><td class="mdescRight">GPIO Bank 4.  <a href="group__gpiops.html#ga7dae320aafb3cb94ac932b34910c7aca">More...</a><br/></td></tr>
<tr class="separator:ga7dae320aafb3cb94ac932b34910c7aca"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1a534b60d76cf75ff1fc781d23f4229c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#ga1a534b60d76cf75ff1fc781d23f4229c">XGPIOPS_BANK5</a>&#160;&#160;&#160;0x05U</td></tr>
<tr class="memdesc:ga1a534b60d76cf75ff1fc781d23f4229c"><td class="mdescLeft">&#160;</td><td class="mdescRight">GPIO Bank 5.  <a href="group__gpiops.html#ga1a534b60d76cf75ff1fc781d23f4229c">More...</a><br/></td></tr>
<tr class="separator:ga1a534b60d76cf75ff1fc781d23f4229c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab8661a0444fd67d2b87a14b3c196e571"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#gab8661a0444fd67d2b87a14b3c196e571">XGPIOPS_MAX_BANKS_ZYNQMP</a>&#160;&#160;&#160;0x06U</td></tr>
<tr class="memdesc:gab8661a0444fd67d2b87a14b3c196e571"><td class="mdescLeft">&#160;</td><td class="mdescRight">Max banks in a Zynq Ultrascale+ MP GPIO device.  <a href="group__gpiops.html#gab8661a0444fd67d2b87a14b3c196e571">More...</a><br/></td></tr>
<tr class="separator:gab8661a0444fd67d2b87a14b3c196e571"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga27b466ba78cf142027ca998d0d67d2e0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#ga27b466ba78cf142027ca998d0d67d2e0">XGPIOPS_MAX_BANKS</a>&#160;&#160;&#160;0x04U</td></tr>
<tr class="memdesc:ga27b466ba78cf142027ca998d0d67d2e0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Max banks in a Zynq GPIO device.  <a href="group__gpiops.html#ga27b466ba78cf142027ca998d0d67d2e0">More...</a><br/></td></tr>
<tr class="separator:ga27b466ba78cf142027ca998d0d67d2e0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2a4b2e730c0c6dee73b64f9914de6861"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#ga2a4b2e730c0c6dee73b64f9914de6861">XGPIOPS_MAX_BANKS_CNT</a>&#160;&#160;&#160;0x06U</td></tr>
<tr class="memdesc:ga2a4b2e730c0c6dee73b64f9914de6861"><td class="mdescLeft">&#160;</td><td class="mdescRight">Max banks number of all platforms.  <a href="group__gpiops.html#ga2a4b2e730c0c6dee73b64f9914de6861">More...</a><br/></td></tr>
<tr class="separator:ga2a4b2e730c0c6dee73b64f9914de6861"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8f80173cb28cbac5bab53c4fc7c7dd96"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#ga8f80173cb28cbac5bab53c4fc7c7dd96">XGPIOPS_DEVICE_MAX_PIN_NUM_ZYNQMP</a>&#160;&#160;&#160;(u32)174</td></tr>
<tr class="memdesc:ga8f80173cb28cbac5bab53c4fc7c7dd96"><td class="mdescLeft">&#160;</td><td class="mdescRight">Max pins in the Zynq Ultrascale+ MP GPIO device 0 - 25, Bank 0 26 - 51, Bank 1 52 - 77, Bank 2 78 - 109, Bank 3 110 - 141, Bank 4 142 - 173, Bank 5.  <a href="group__gpiops.html#ga8f80173cb28cbac5bab53c4fc7c7dd96">More...</a><br/></td></tr>
<tr class="separator:ga8f80173cb28cbac5bab53c4fc7c7dd96"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6d70822b76e1dd3fda458ed693a082af"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#ga6d70822b76e1dd3fda458ed693a082af">XGPIOPS_DEVICE_MAX_PIN_NUM</a>&#160;&#160;&#160;(u32)118</td></tr>
<tr class="memdesc:ga6d70822b76e1dd3fda458ed693a082af"><td class="mdescLeft">&#160;</td><td class="mdescRight">Max pins in the Zynq GPIO device 0 - 31, Bank 0 32 - 53, Bank 1 54 - 85, Bank 2 86 - 117, Bank 3.  <a href="group__gpiops.html#ga6d70822b76e1dd3fda458ed693a082af">More...</a><br/></td></tr>
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<tr><td colspan="2"><div class="groupHeader">Interrupt types</div></td></tr>
<tr><td colspan="2"><div class="groupText"><p>The following constants define the interrupt types that can be set for each GPIO pin. </p>
</div></td></tr>
<tr class="memitem:ga25b306607f3b370ea355229c21e7db02"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#ga25b306607f3b370ea355229c21e7db02">XGPIOPS_IRQ_TYPE_EDGE_RISING</a>&#160;&#160;&#160;0x00U</td></tr>
<tr class="memdesc:ga25b306607f3b370ea355229c21e7db02"><td class="mdescLeft">&#160;</td><td class="mdescRight">Interrupt on Rising edge.  <a href="group__gpiops.html#ga25b306607f3b370ea355229c21e7db02">More...</a><br/></td></tr>
<tr class="separator:ga25b306607f3b370ea355229c21e7db02"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae8082ec62bd44c68e3334b77c87fca96"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#gae8082ec62bd44c68e3334b77c87fca96">XGPIOPS_IRQ_TYPE_EDGE_FALLING</a>&#160;&#160;&#160;0x01U</td></tr>
<tr class="memdesc:gae8082ec62bd44c68e3334b77c87fca96"><td class="mdescLeft">&#160;</td><td class="mdescRight">Interrupt Falling edge.  <a href="group__gpiops.html#gae8082ec62bd44c68e3334b77c87fca96">More...</a><br/></td></tr>
<tr class="separator:gae8082ec62bd44c68e3334b77c87fca96"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaaa0415781a99043db06849daa027d5c5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#gaaa0415781a99043db06849daa027d5c5">XGPIOPS_IRQ_TYPE_EDGE_BOTH</a>&#160;&#160;&#160;0x02U</td></tr>
<tr class="memdesc:gaaa0415781a99043db06849daa027d5c5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Interrupt on both edges.  <a href="group__gpiops.html#gaaa0415781a99043db06849daa027d5c5">More...</a><br/></td></tr>
<tr class="separator:gaaa0415781a99043db06849daa027d5c5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga09bf1d6e818f6f442ba61535f8e855ea"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#ga09bf1d6e818f6f442ba61535f8e855ea">XGPIOPS_IRQ_TYPE_LEVEL_HIGH</a>&#160;&#160;&#160;0x03U</td></tr>
<tr class="memdesc:ga09bf1d6e818f6f442ba61535f8e855ea"><td class="mdescLeft">&#160;</td><td class="mdescRight">Interrupt on high level.  <a href="group__gpiops.html#ga09bf1d6e818f6f442ba61535f8e855ea">More...</a><br/></td></tr>
<tr class="separator:ga09bf1d6e818f6f442ba61535f8e855ea"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga84b599940b75f6e1d6920c7b33fc2789"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#ga84b599940b75f6e1d6920c7b33fc2789">XGPIOPS_IRQ_TYPE_LEVEL_LOW</a>&#160;&#160;&#160;0x04U</td></tr>
<tr class="memdesc:ga84b599940b75f6e1d6920c7b33fc2789"><td class="mdescLeft">&#160;</td><td class="mdescRight">Interrupt on low level.  <a href="group__gpiops.html#ga84b599940b75f6e1d6920c7b33fc2789">More...</a><br/></td></tr>
<tr class="separator:ga84b599940b75f6e1d6920c7b33fc2789"><td class="memSeparator" colspan="2">&#160;</td></tr>
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="typedef-members"></a>
Typedefs</h2></td></tr>
<tr class="memitem:ga2349a384fe8a39f89168780f84940efc"><td class="memItemLeft" align="right" valign="top">typedef void(*&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#ga2349a384fe8a39f89168780f84940efc">XGpioPs_Handler</a> )(void *CallBackRef, u32 Bank, u32 Status)</td></tr>
<tr class="memdesc:ga2349a384fe8a39f89168780f84940efc"><td class="mdescLeft">&#160;</td><td class="mdescRight">This handler data type allows the user to define a callback function to handle the interrupts for the GPIO device.  <a href="group__gpiops.html#ga2349a384fe8a39f89168780f84940efc">More...</a><br/></td></tr>
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Functions</h2></td></tr>
<tr class="memitem:ga44dd638bb4642b969f6ba6edbd55a748"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#ga44dd638bb4642b969f6ba6edbd55a748">XGpioPs_CfgInitialize</a> (<a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, const <a class="el" href="struct_x_gpio_ps___config.html">XGpioPs_Config</a> *ConfigPtr, UINTPTR EffectiveAddr)</td></tr>
<tr class="memdesc:ga44dd638bb4642b969f6ba6edbd55a748"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function initializes a <a class="el" href="struct_x_gpio_ps.html" title="The XGpioPs driver instance data. ">XGpioPs</a> instance/driver.  <a href="group__gpiops.html#ga44dd638bb4642b969f6ba6edbd55a748">More...</a><br/></td></tr>
<tr class="separator:ga44dd638bb4642b969f6ba6edbd55a748"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaac891da3a0b1ed5697644d621483ed62"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#gaac891da3a0b1ed5697644d621483ed62">XGpioPs_Read</a> (const <a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u8 Bank)</td></tr>
<tr class="memdesc:gaac891da3a0b1ed5697644d621483ed62"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read the Data register of the specified GPIO bank.  <a href="group__gpiops.html#gaac891da3a0b1ed5697644d621483ed62">More...</a><br/></td></tr>
<tr class="separator:gaac891da3a0b1ed5697644d621483ed62"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0f55b3804d13293880455a79d4f45e37"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#ga0f55b3804d13293880455a79d4f45e37">XGpioPs_Write</a> (const <a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u8 Bank, u32 Data)</td></tr>
<tr class="memdesc:ga0f55b3804d13293880455a79d4f45e37"><td class="mdescLeft">&#160;</td><td class="mdescRight">Write to the Data register of the specified GPIO bank.  <a href="group__gpiops.html#ga0f55b3804d13293880455a79d4f45e37">More...</a><br/></td></tr>
<tr class="separator:ga0f55b3804d13293880455a79d4f45e37"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaab9fbd0037438e57fa33d096ac724613"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#gaab9fbd0037438e57fa33d096ac724613">XGpioPs_SetDirection</a> (const <a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u8 Bank, u32 Direction)</td></tr>
<tr class="memdesc:gaab9fbd0037438e57fa33d096ac724613"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the Direction of the pins of the specified GPIO Bank.  <a href="group__gpiops.html#gaab9fbd0037438e57fa33d096ac724613">More...</a><br/></td></tr>
<tr class="separator:gaab9fbd0037438e57fa33d096ac724613"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7eb1bb1c621ea32f0b14c9ee47c23319"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#ga7eb1bb1c621ea32f0b14c9ee47c23319">XGpioPs_GetDirection</a> (const <a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u8 Bank)</td></tr>
<tr class="memdesc:ga7eb1bb1c621ea32f0b14c9ee47c23319"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the Direction of the pins of the specified GPIO Bank.  <a href="group__gpiops.html#ga7eb1bb1c621ea32f0b14c9ee47c23319">More...</a><br/></td></tr>
<tr class="separator:ga7eb1bb1c621ea32f0b14c9ee47c23319"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7c1ae54b29cedd921fbe9f6ef503ceef"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#ga7c1ae54b29cedd921fbe9f6ef503ceef">XGpioPs_SetOutputEnable</a> (const <a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u8 Bank, u32 OpEnable)</td></tr>
<tr class="memdesc:ga7c1ae54b29cedd921fbe9f6ef503ceef"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the Output Enable of the pins of the specified GPIO Bank.  <a href="group__gpiops.html#ga7c1ae54b29cedd921fbe9f6ef503ceef">More...</a><br/></td></tr>
<tr class="separator:ga7c1ae54b29cedd921fbe9f6ef503ceef"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7977b334cb165a1cc2859b1bc1ac43df"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#ga7977b334cb165a1cc2859b1bc1ac43df">XGpioPs_GetOutputEnable</a> (const <a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u8 Bank)</td></tr>
<tr class="memdesc:ga7977b334cb165a1cc2859b1bc1ac43df"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the Output Enable status of the pins of the specified GPIO Bank.  <a href="group__gpiops.html#ga7977b334cb165a1cc2859b1bc1ac43df">More...</a><br/></td></tr>
<tr class="separator:ga7977b334cb165a1cc2859b1bc1ac43df"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaefc766e08002c191864802d6e3a3434e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#gaefc766e08002c191864802d6e3a3434e">XGpioPs_GetBankPin</a> (u8 PinNumber, u8 *BankNumber, u8 *PinNumberInBank)</td></tr>
<tr class="memdesc:gaefc766e08002c191864802d6e3a3434e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the Bank number and the Pin number in the Bank, for the given PinNumber in the GPIO device.  <a href="group__gpiops.html#gaefc766e08002c191864802d6e3a3434e">More...</a><br/></td></tr>
<tr class="separator:gaefc766e08002c191864802d6e3a3434e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5af7399d35110ae5f71be57316a2b9ee"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#ga5af7399d35110ae5f71be57316a2b9ee">XGpioPs_ReadPin</a> (const <a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u32 Pin)</td></tr>
<tr class="memdesc:ga5af7399d35110ae5f71be57316a2b9ee"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read Data from the specified pin.  <a href="group__gpiops.html#ga5af7399d35110ae5f71be57316a2b9ee">More...</a><br/></td></tr>
<tr class="separator:ga5af7399d35110ae5f71be57316a2b9ee"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab9ff633d57fb32cac3424571ba690332"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#gab9ff633d57fb32cac3424571ba690332">XGpioPs_WritePin</a> (const <a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u32 Pin, u32 Data)</td></tr>
<tr class="memdesc:gab9ff633d57fb32cac3424571ba690332"><td class="mdescLeft">&#160;</td><td class="mdescRight">Write data to the specified pin.  <a href="group__gpiops.html#gab9ff633d57fb32cac3424571ba690332">More...</a><br/></td></tr>
<tr class="separator:gab9ff633d57fb32cac3424571ba690332"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7cbd9e1081b8ed84d38b475fc89271cf"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#ga7cbd9e1081b8ed84d38b475fc89271cf">XGpioPs_SetDirectionPin</a> (const <a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u32 Pin, u32 Direction)</td></tr>
<tr class="memdesc:ga7cbd9e1081b8ed84d38b475fc89271cf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the Direction of the specified pin.  <a href="group__gpiops.html#ga7cbd9e1081b8ed84d38b475fc89271cf">More...</a><br/></td></tr>
<tr class="separator:ga7cbd9e1081b8ed84d38b475fc89271cf"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa3bacad17006e4b01ff91f6f14e5d3f7"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#gaa3bacad17006e4b01ff91f6f14e5d3f7">XGpioPs_GetDirectionPin</a> (const <a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u32 Pin)</td></tr>
<tr class="memdesc:gaa3bacad17006e4b01ff91f6f14e5d3f7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the Direction of the specified pin.  <a href="group__gpiops.html#gaa3bacad17006e4b01ff91f6f14e5d3f7">More...</a><br/></td></tr>
<tr class="separator:gaa3bacad17006e4b01ff91f6f14e5d3f7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga841cc1098a21bdedec893545f15b025a"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#ga841cc1098a21bdedec893545f15b025a">XGpioPs_SetOutputEnablePin</a> (const <a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u32 Pin, u32 OpEnable)</td></tr>
<tr class="memdesc:ga841cc1098a21bdedec893545f15b025a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the Output Enable of the specified pin.  <a href="group__gpiops.html#ga841cc1098a21bdedec893545f15b025a">More...</a><br/></td></tr>
<tr class="separator:ga841cc1098a21bdedec893545f15b025a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga17714eeb15fff954fc42d6008e67af17"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#ga17714eeb15fff954fc42d6008e67af17">XGpioPs_GetOutputEnablePin</a> (const <a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u32 Pin)</td></tr>
<tr class="memdesc:ga17714eeb15fff954fc42d6008e67af17"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the Output Enable status of the specified pin.  <a href="group__gpiops.html#ga17714eeb15fff954fc42d6008e67af17">More...</a><br/></td></tr>
<tr class="separator:ga17714eeb15fff954fc42d6008e67af17"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga173133193aeba362fa0a5c6e7cdd8dfa"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#ga173133193aeba362fa0a5c6e7cdd8dfa">XGpioPs_SelfTest</a> (<a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga173133193aeba362fa0a5c6e7cdd8dfa"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function runs a self-test on the GPIO driver/device.  <a href="group__gpiops.html#ga173133193aeba362fa0a5c6e7cdd8dfa">More...</a><br/></td></tr>
<tr class="separator:ga173133193aeba362fa0a5c6e7cdd8dfa"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga812e5a4df20dcae1a95ec4b15d36f039"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#ga812e5a4df20dcae1a95ec4b15d36f039">XGpioPs_IntrEnable</a> (<a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u8 Bank, u32 Mask)</td></tr>
<tr class="memdesc:ga812e5a4df20dcae1a95ec4b15d36f039"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function enables the interrupts for the specified pins in the specified bank.  <a href="group__gpiops.html#ga812e5a4df20dcae1a95ec4b15d36f039">More...</a><br/></td></tr>
<tr class="separator:ga812e5a4df20dcae1a95ec4b15d36f039"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5b84f2cbaaa08abf138209b975192326"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#ga5b84f2cbaaa08abf138209b975192326">XGpioPs_IntrDisable</a> (<a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u8 Bank, u32 Mask)</td></tr>
<tr class="memdesc:ga5b84f2cbaaa08abf138209b975192326"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function disables the interrupts for the specified pins in the specified bank.  <a href="group__gpiops.html#ga5b84f2cbaaa08abf138209b975192326">More...</a><br/></td></tr>
<tr class="separator:ga5b84f2cbaaa08abf138209b975192326"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaad995f8c0ff2801d22cc405dacb3ed19"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#gaad995f8c0ff2801d22cc405dacb3ed19">XGpioPs_IntrGetEnabled</a> (const <a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u8 Bank)</td></tr>
<tr class="memdesc:gaad995f8c0ff2801d22cc405dacb3ed19"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function returns the interrupt enable status for a bank.  <a href="group__gpiops.html#gaad995f8c0ff2801d22cc405dacb3ed19">More...</a><br/></td></tr>
<tr class="separator:gaad995f8c0ff2801d22cc405dacb3ed19"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga47fc6f53355030ef41927f38fe37753f"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#ga47fc6f53355030ef41927f38fe37753f">XGpioPs_IntrGetStatus</a> (const <a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u8 Bank)</td></tr>
<tr class="memdesc:ga47fc6f53355030ef41927f38fe37753f"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function returns interrupt status read from Interrupt Status Register.  <a href="group__gpiops.html#ga47fc6f53355030ef41927f38fe37753f">More...</a><br/></td></tr>
<tr class="separator:ga47fc6f53355030ef41927f38fe37753f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gace8ee040fe190af86afe59ec1bc3201c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#gace8ee040fe190af86afe59ec1bc3201c">XGpioPs_IntrClear</a> (const <a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u8 Bank, u32 Mask)</td></tr>
<tr class="memdesc:gace8ee040fe190af86afe59ec1bc3201c"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function clears pending interrupt(s) with the provided mask.  <a href="group__gpiops.html#gace8ee040fe190af86afe59ec1bc3201c">More...</a><br/></td></tr>
<tr class="separator:gace8ee040fe190af86afe59ec1bc3201c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac729652384b6d04711a9d1f2a62aee1d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#gac729652384b6d04711a9d1f2a62aee1d">XGpioPs_SetIntrType</a> (const <a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u8 Bank, u32 IntrType, u32 IntrPolarity, u32 IntrOnAny)</td></tr>
<tr class="memdesc:gac729652384b6d04711a9d1f2a62aee1d"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function is used for setting the Interrupt Type, Interrupt Polarity and Interrupt On Any for the specified GPIO Bank pins.  <a href="group__gpiops.html#gac729652384b6d04711a9d1f2a62aee1d">More...</a><br/></td></tr>
<tr class="separator:gac729652384b6d04711a9d1f2a62aee1d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaed18cb81aceda214dba440cf6ff3d0ec"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#gaed18cb81aceda214dba440cf6ff3d0ec">XGpioPs_GetIntrType</a> (const <a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u8 Bank, u32 *IntrType, u32 *IntrPolarity, u32 *IntrOnAny)</td></tr>
<tr class="memdesc:gaed18cb81aceda214dba440cf6ff3d0ec"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function is used for getting the Interrupt Type, Interrupt Polarity and Interrupt On Any for the specified GPIO Bank pins.  <a href="group__gpiops.html#gaed18cb81aceda214dba440cf6ff3d0ec">More...</a><br/></td></tr>
<tr class="separator:gaed18cb81aceda214dba440cf6ff3d0ec"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gacd63e0e5c7ed18517d54104e4ad6dcd4"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#gacd63e0e5c7ed18517d54104e4ad6dcd4">XGpioPs_SetCallbackHandler</a> (<a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, void *CallBackRef, <a class="el" href="group__gpiops.html#ga2349a384fe8a39f89168780f84940efc">XGpioPs_Handler</a> FuncPointer)</td></tr>
<tr class="memdesc:gacd63e0e5c7ed18517d54104e4ad6dcd4"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the status callback function.  <a href="group__gpiops.html#gacd63e0e5c7ed18517d54104e4ad6dcd4">More...</a><br/></td></tr>
<tr class="separator:gacd63e0e5c7ed18517d54104e4ad6dcd4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafd0478d095fee0db04a29b43436306ef"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#gafd0478d095fee0db04a29b43436306ef">XGpioPs_IntrHandler</a> (const <a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr)</td></tr>
<tr class="memdesc:gafd0478d095fee0db04a29b43436306ef"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function is the interrupt handler for GPIO interrupts.It checks the interrupt status registers of all the banks to determine the actual bank in which an interrupt has been triggered.  <a href="group__gpiops.html#gafd0478d095fee0db04a29b43436306ef">More...</a><br/></td></tr>
<tr class="separator:gafd0478d095fee0db04a29b43436306ef"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4ef808e6f8e113ba1371f44c35b1d0d9"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#ga4ef808e6f8e113ba1371f44c35b1d0d9">XGpioPs_SetIntrTypePin</a> (const <a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u32 Pin, u8 IrqType)</td></tr>
<tr class="memdesc:ga4ef808e6f8e113ba1371f44c35b1d0d9"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function is used for setting the IRQ Type of a single GPIO pin.  <a href="group__gpiops.html#ga4ef808e6f8e113ba1371f44c35b1d0d9">More...</a><br/></td></tr>
<tr class="separator:ga4ef808e6f8e113ba1371f44c35b1d0d9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga848274dc058043932e802a3caa39db3e"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#ga848274dc058043932e802a3caa39db3e">XGpioPs_GetIntrTypePin</a> (const <a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u32 Pin)</td></tr>
<tr class="memdesc:ga848274dc058043932e802a3caa39db3e"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function returns the IRQ Type of a given GPIO pin.  <a href="group__gpiops.html#ga848274dc058043932e802a3caa39db3e">More...</a><br/></td></tr>
<tr class="separator:ga848274dc058043932e802a3caa39db3e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadc4ea201a1c488a1b667a77f3c6fd23b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#gadc4ea201a1c488a1b667a77f3c6fd23b">XGpioPs_IntrEnablePin</a> (<a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u32 Pin)</td></tr>
<tr class="memdesc:gadc4ea201a1c488a1b667a77f3c6fd23b"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function enables the interrupt for the specified pin.  <a href="group__gpiops.html#gadc4ea201a1c488a1b667a77f3c6fd23b">More...</a><br/></td></tr>
<tr class="separator:gadc4ea201a1c488a1b667a77f3c6fd23b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8a00fd131bf76eab2dcdd48079845b37"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#ga8a00fd131bf76eab2dcdd48079845b37">XGpioPs_IntrDisablePin</a> (<a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u32 Pin)</td></tr>
<tr class="memdesc:ga8a00fd131bf76eab2dcdd48079845b37"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function disables the interrupts for the specified pin.  <a href="group__gpiops.html#ga8a00fd131bf76eab2dcdd48079845b37">More...</a><br/></td></tr>
<tr class="separator:ga8a00fd131bf76eab2dcdd48079845b37"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga323857757f17a313a984de0b522341e3"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#ga323857757f17a313a984de0b522341e3">XGpioPs_IntrGetEnabledPin</a> (const <a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u32 Pin)</td></tr>
<tr class="memdesc:ga323857757f17a313a984de0b522341e3"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function returns whether interrupts are enabled for the specified pin.  <a href="group__gpiops.html#ga323857757f17a313a984de0b522341e3">More...</a><br/></td></tr>
<tr class="separator:ga323857757f17a313a984de0b522341e3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga405556c1d1bc856dd35f8a4a92f50345"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#ga405556c1d1bc856dd35f8a4a92f50345">XGpioPs_IntrGetStatusPin</a> (const <a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u32 Pin)</td></tr>
<tr class="memdesc:ga405556c1d1bc856dd35f8a4a92f50345"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function returns interrupt enable status of the specified pin.  <a href="group__gpiops.html#ga405556c1d1bc856dd35f8a4a92f50345">More...</a><br/></td></tr>
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<tr class="memitem:ga1b7365f4849c4bc37dbd0cee7df2b73b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#ga1b7365f4849c4bc37dbd0cee7df2b73b">XGpioPs_IntrClearPin</a> (const <a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u32 Pin)</td></tr>
<tr class="memdesc:ga1b7365f4849c4bc37dbd0cee7df2b73b"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function clears the specified pending interrupt.  <a href="group__gpiops.html#ga1b7365f4849c4bc37dbd0cee7df2b73b">More...</a><br/></td></tr>
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<tr class="memitem:ga9c49687af4625a0ed49f376d3ff1b045"><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_x_gpio_ps___config.html">XGpioPs_Config</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#ga9c49687af4625a0ed49f376d3ff1b045">XGpioPs_LookupConfig</a> (u16 DeviceId)</td></tr>
<tr class="memdesc:ga9c49687af4625a0ed49f376d3ff1b045"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function looks for the device configuration based on the unique device ID.  <a href="group__gpiops.html#ga9c49687af4625a0ed49f376d3ff1b045">More...</a><br/></td></tr>
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Variables</h2></td></tr>
<tr class="memitem:gaa25c29c5d57afe2c714f78a54a182403"><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_x_gpio_ps___config.html">XGpioPs_Config</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops.html#gaa25c29c5d57afe2c714f78a54a182403">XGpioPs_ConfigTable</a> []</td></tr>
<tr class="memdesc:gaa25c29c5d57afe2c714f78a54a182403"><td class="mdescLeft">&#160;</td><td class="mdescRight">This table contains configuration information for each GPIO device in the system.  <a href="group__gpiops.html#gaa25c29c5d57afe2c714f78a54a182403">More...</a><br/></td></tr>
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